Radiation-Hardened Processor Modules
RadHard_Processor_Module_Array
Three identical radiation-hardened processor modules forming the TMR processing array, each containing a RAD5500-class PowerPC processor with local cache, clock generation, and power regulation for independent operation.
Purpose
Provide the primary computational engines that execute flight software, process telemetry, run scheduling algorithms, and generate command outputs. Each module operates independently to enable TMR majority voting and graceful degradation upon single-module failure.
Context
The processor modules are the computational heart of the Lunar Ark. Three modules run identical software in lockstep, with outputs compared by the TMR voter. Each module must tolerate >300 krad TID over 100 years and survive thousands of thermal cycles between lunar day and night. A fourth cold-spare module is maintained by the robotic subsystem for swap-in replacement when cumulative radiation damage degrades a primary module.
Principles
- ▸Silicon-on-Insulator (SOI) fabrication for inherent radiation hardness
- ▸Each processor module is a self-contained Line Replaceable Unit (LRU) for robotic swap
- ▸Internal EDAC on all cache and register files for SEU mitigation
- ▸Power-on self-test (POST) sequence validates processor integrity before joining TMR voting
- ▸Clock domain crossing isolation prevents single-clock failure from affecting all modules
Typical implementations
- ▸BAE Systems RAD5500 quad-core PowerPC (1.4 GFLOPS, 150nm SOI, 1 Mrad TID)
- ▸Cobham Gaisler GR740 quad-core LEON4 SPARC-V8 (400 MHz, 65nm, 300 krad TID)
- ▸Frontgrade Technologies HPSC (High Performance Spaceflight Computing) processor
- ▸Custom FPGA-based soft-core processor on Microchip RTG4 for backup
Lunar considerations
- ▸Junction temperature management critical during 14-day lunar day peak thermal loads
- ▸SEL protection via current-limiting circuits on all power rails with <10us response time
- ▸BGA package solder joint fatigue from thermal cycling requires underfill reinforcement
- ▸Cold spare stored in thermally stable vault to minimize aging when not powered
Specifications
Functional
| primary function | Execute flight software in radiation-hardened processor cores as part of TMR voting array |
| inputs | Boot image from L3-CDH-PROC-BOOT, Working data from L3-CDH-PROC-MEM, Clock and synchronization signals, Power rails from L1-PWR (28V primary, 3.3V/1.0V regulated) |
| outputs | Computational results to L3-CDH-PROC-TMR voter, Processor health telemetry (temperature, current, error counts), Cache coherency signals between modules, Interrupt acknowledgments and DMA transfers to L3-CDH-PROC-MEM |
| clock frequency mhz | 400 |
| processing power mips | 700 |
| cache l1 kb | 64 |
| cache l2 kb | 512 |
| seu rate per device day | 0.01 |
| power on self test duration s | 5 |
Physical
| mass kg | 4.5 |
| dimensions | 0.2m x 0.15m x 0.05m per module (3 active + 1 cold spare) |
| materials | Ceramic column grid array (CCGA) package for processor die, Aluminum-6061-T6 module frame with tantalum spot shielding, Polyimide PCB with embedded copper planes for EMI shielding, Gold-plated wedgelock card-edge connector for backplane interface |
| operating temp c | -40 to +85 |
| survival temp c | -55 to +125 |
| radiation tolerance krad | 1000 |
| sel latchup threshold mev cm2 mg | 80 |
| vacuum compatible | True |
Operational
| power consumption w | 12 |
| thermal range c | -40, 85 |
| lifetime years | 25 |
| mtbf hours | 250000 |
Interfaces
Provides
- All processor outputs (commands, data, state) routed to TMR voter for majority comparison before external distribution.
- Address, data, and control signals for read/write access to working memory via ECC-protected bus.
Requires
- Initial boot code loaded from triple-redundant non-volatile storage at power-on or watchdog reset.
- Processor must periodically reset watchdog timer; failure triggers hardware reset of the module.
- 28V primary bus converted locally to 3.3V I/O and 1.0V core voltage via point-of-load regulators.
- Conductive cooling path to cold plate and radiator for heat dissipation during lunar day.
Cite this entry
Lunar Ark Codex. "Radiation-Hardened Processor Modules" (L3-CDH-PROC-CPU). Retrieved 10 September 2026, from https://lunarark.com/entry/L3-CDH-PROC-CPU
Licensed CC-BY-SA 4.0. You may reuse and adapt this entry with attribution, under the same licence.