L2-CDH-PROC CRITICAL COMMAND CONTROL Level 2 · hardware

Central Processing System

Central_Processing_System_RadHard

The Central Processing System is an 18-kilogram, radiation-hardened computing assembly that provides Triple Modular Redundant processing and system coordination drawing 45 watts of power. Operating across a 100-year continuous lifetime, the system delivers 2,000 MIPS of computational throughput while three independent processing strings perform majority voting on critical decisions with a 100-microsecond latency. The lunar radiation environment imposes cumulative total ionizing doses exceeding 300 kilorads alongside single-event latchup risks on power rails, while multi-decade thermal cycling stresses solder joints and ceramic ball grid array packages. To maintain deterministic operation, the architecture integrates silicon-on-insulator processors, error-correcting code memory, and watchdog timers that force recovery within 500 milliseconds.

Radiation-hardened central flight computers providing Triple Modular Redundant (TMR) processing for all mission-critical computations, command execution, and system coordination.

Purpose

Execute the main flight software, perform TMR voting on all critical decisions, manage system-wide scheduling, and provide the primary computational backbone that all other CDH subsystems depend on for 100-year continuous operation.

Context

The central processing system is the brain of the Lunar Ark. It must withstand cumulative radiation damage over a century while maintaining deterministic real-time performance. Three independent processing strings vote on every critical output. If one string fails, the remaining two continue operation while the faulty unit is diagnosed and potentially replaced by robotic maintenance.

Principles

▸Triple Modular Redundancy with majority voting on all critical outputs
▸Radiation hardening by design: SOI process, guard rings, ECC memory
▸Watchdog timers force recovery from software hangs within milliseconds
▸Cold spare processor available for hot-swap replacement
▸Deterministic real-time scheduling ensures time-critical tasks never miss deadlines

Typical implementations

▸BAE Systems RAD5500 (PowerPC-based, 1.4 GFLOPS, 1 Mrad TID)
▸Cobham Gaisler GR740 (quad-core LEON4 SPARC, 400 MHz, 300 krad TID)
▸Microchip RTG4 FPGA for custom hardware acceleration
▸ECC SRAM and EDAC-protected SDRAM for working memory
▸Triple-redundant PROM/flash for boot firmware with voting

Lunar considerations

▸100-year TID accumulation requires >300 krad tolerance or periodic replacement
▸Single-event latchup (SEL) protection circuits on all power rails
▸Thermal cycling stress on solder joints and BGA packages over decades
▸Cold spare strategy to extend operational lifetime beyond single-unit MTBF
▸Processor technology refresh every 20-25 years via robotic board swap

Specifications

Functional

primary function	Provide TMR-voted radiation-hardened central processing for flight software execution and system coordination
inputs	Telemetry data from L2-CDH-BUS data bus network, Sensor fusion outputs from L2-CDH-FUSE, Autonomy engine decisions from L2-CDH-AUTO, Software images from L2-CDH-SW, Stored data requests from L2-CDH-STOR
outputs	Voted command outputs to L2-CDH-BUS for distribution, Processing results to L2-CDH-STOR for logging, System state to L2-CDH-FUSE for fusion updates, Scheduling directives to L2-CDH-DIST edge nodes, Health telemetry to parent L1-CDH
processing power mips	2000
tmr voting latency us	100
ecc correction rate	single-bit correct, double-bit detect
watchdog timeout ms	500
boot time s	30
context switch us	50

Physical

mass kg	18
dimensions	3 x processor modules at 0.2m x 0.15m x 0.1m each, plus voter/backplane
materials	Radiation-shielded aluminum enclosure with tantalum spot shields, Ceramic BGA packages for rad-hard processors, Gold-plated hermetic connectors (MIL-DTL-38999), Polyimide PCB substrate (high-Tg FR-4 alternative)
operating temp c	-40 to +85
survival temp c	-55 to +125
radiation tolerance krad	300
sel latchup immunity mev cm2 mg	80
vacuum compatible	True

Operational

power consumption w	45
power consumption sleep w	5
thermal range c	-40, 85
lifetime years	100
mtbf hours	200000

Interfaces

Provides

→Data Bus NetworkVoted command outputscritical
TMR-voted commands and data packets for distribution to all subsystems via the data bus network.
→Distributed Processing NodesTask scheduling and coordinationessential
High-level task assignments and scheduling directives to distributed processing nodes.
→Autonomy and Decision EngineComputational resourcesessential
Processing cycles for AI/ML inference and mission planning algorithms.
→Sensor Fusion EngineFusion processing supportessential
Matrix computation and state estimation processing for sensor fusion engine.

Requires

←Power Generation SystemCritical bus powercritical
Uninterruptible 28V primary and 3.3V/1.0V regulated rails for processor cores.
←Data Bus NetworkData bus connectivitycritical
Physical and protocol-layer access to MIL-STD-1553 and SpaceWire data buses.
←Flight Software FrameworkFlight software imagescritical
Boot firmware, OS kernel, and application software for processor initialization and operation.
←Data Storage SystemNon-volatile storage accesscritical
Read/write access to persistent storage for boot images, configuration, and operational data.
←Active Thermal Control SystemThermal regulationcritical
Active cooling during lunar day and heating during lunar night to maintain junction temperatures.